An integrated circuit may be formed using a complementary metal-oxide-semiconductor (CMOS) fabrication process, which includes n-channel metal oxide semiconductor (NMOS) transistors and p-channel metal oxide semiconductor (PMOS) transistors. CMOS offers the advantages of a relatively inexpensive fabrication process, low power dissipation circuits, and transistors that can be tightly packed and scaled. It may be desirable to incorporate a bipolar junction transistor which is electrically isolated from a substrate of the integrated circuit, which has a current gain (hfe) greater than 10, and takes up little space. It may further be desirable to integrate the isolated bipolar transistor without increasing cost or complexity of the fabrication process. Forming an isolated bipolar transistor the meets these criteria may be problematic.